1. Field of the Invention
The present invention relates to a one time programmable (OTP) memory cell, and more particularly, to a one time programmable memory cell capable of reducing current leakage.
2. Description of the Prior Art
Non-volatile memory (NVM) is a type of memory that retains information it stores even when no power is supplied to memory blocks thereof. Some examples include magnetic devices, optical discs, flash memory, and other semiconductor-based memory topologies. According to the programming times limit, non-volatile memory devices are divided into multi-time programmable (MTP) memory and one-time programmable (OTP) memory. As shown in FIG. 1, a conventional OTP memory cell 100 comprises a transistor 110 and an antifuse transistor 120. When programming the OTP memory cell 100, the antifuse transistor 120 is ruptured and behaves as a MOS capacitor, such that data of logic “1” is written into the OTP memory 100.
Please refer to FIG. 2 and FIG. 3 together. FIG. 2 is a diagram showing a good rupture status of the OTP memory cell of FIG. 1 after programming. FIG. 3 is a diagram showing a bad rupture status of the OTP memory cell of FIG. 1 after programming. As showing in FIG. 2, when a gate oxide layer Ox corresponding to a gate terminal G of the antifuse transistor 120 is ruptured near a source terminal S of the antifuse transistor 120, leakage current between the gate terminal G and the source terminal S is smaller. As showing in FIG. 3, when the gate oxide layer Ox corresponding to the gate terminal G of the antifuse transistor is ruptured near a channel area of the antifuse transistor 120, leakage current between the gate terminal G and the source terminal S is larger, since more current can escape through the channel area.
However, in the prior art, it is difficult to control rupture position of the gate oxide layer Ox, such that the OTP memory cell 100 of the prior art may work incorrectly or has slow bit response due to insufficient power caused by the leakage current.